Virtual University of Pakistan

CS302 : Digital Logic Design

Course Overview

Course Synopsis

Digital Logic Design is a technological subject which is intended to make students familiar with different types of designs as sequential logic circuits, combinational logic circuits, trouble shooting of various digital systems, study of various digital systems. It is an introductory electronics course covering Basic Electron Theory, Resistors, Analog and Digital Wave forms, Number systems, Conversions, Logic Gates, Boolean Algebra, Combination Circuit Design, Flip-Flops, Shift Registers and Counters. After reading this course students would have complete understanding about the low level architecture of any digital system of diverse areas like computer systems, telephony, data processing system, radar, navigation, military systems, medical instruments, process controls etc.

Course Learning Outcomes

At the end of the course, you should be able to:

• Identify and work with different number systems and codes.
• Discuss logic gates, combinational circuits, Boolean Algebra.
• Know how Boolean expressions are simplified using Karnaugh maps.
• Design different combinational circuits like comparator, adders and detectors etc using different simplification methods.
• Understand encoder, decoders, multiplexers and demultiplexers.
• Understand the working of latches, flip flops, synchronous and asynchronous counters, clocks, shift registers.
• Understand memory architecture and basic operations.
• Understand the working of flash memory.
• Describe the working of analogue to digital and digital to analogue converters.

Course Calendar

 Topic Lecture Resource Page An overview and number system 1 Handouts 1-13 Number system 2,3 Handouts 14-30 Number system & codes 4 Handouts 31-39 Logic gates 5 Handouts 40-49 Logic gates and operational characteristics 6 Handouts 50-60 Digital circuits and operational characteristics 7 Handouts 61-70 Boolean algebra and logic simplification 8 Handouts 71-78 SOP and POS form 9 Handouts 79-88 Karnaugh map and Boolean expression simplification 10,11 Handouts 89-108 Assignment No.1 Comparator 12 Handouts 109-117 Odd-Prime number Detector 13 Handouts 118-130 Implementation of an odd-parity generator circuit 14 Handouts 131-140 BCD adder 15 Handouts 141-149 16-Bit ALU 16 Handouts 150-159 The 74xx138 3-to-8 Decoder 17 Handouts 160-168 2-input 4-bit multiplexer 18 Handouts 169-177 Demultiplexer 19 Handouts 178-189 Implementing constant 0s and 1s 20 Handouts 190-199 The GAL16v8 21 Handouts 200-208 Quiz No.1 ABEL input file of a quad 1-of-4 MUX 22 Handouts 209-216 Mid Term Exams Application of S-R latch 23 Handouts 217-236 Applications of edge-triggered D flip-flop 24 Handouts 237-247 Asynchronous preset and clear inputs 25 Handouts 248-257 The 555 timer 26 Handouts 258-269 Down counters 27 Handouts 270-276 Timing diagram of a synchronous decade counter 28 Handouts 277-285 Assignment No.2 Up/Down counter 29 Handouts 286-304 Digital Clock 30 Handouts 305-313 S-R flip-flop based implementation 31 Handouts 314-319 D flip-flop based implementation 32 Handouts 320-327 State assignment 33 Handouts 328-338 Shift registers 34 Handouts 339-348 Applications of shift registers 35,36 Handouts 349-369 Graded Discussion Board Reduced number of input latches 37 Handouts 370-377 Equation definition 38 Handouts 378-386 Memory 39 Handouts 387-395 Decoding large Memories 40 Handouts 396-404 Read and Write cycles 41 Handouts 405-415 Quiz No.2 Flash Memory Array 42 Handouts 416-421 Last in-First out (LIFO) memory 43 Handouts 422-431 A2D Conversion and Op Amp 44 Handouts 432-445 Successiveâ€“Approximation Analogue to Digital converter 45 Handouts 446-453 Final Examination NOTE: It is a tentative plan and can be changed as per requirement. You are advised to check VULMS for updates and announcements from time to time.